Integrated FMC && QSPI

Today, I started with the QSPI Driver, in the last post i have completed until QSPI JEDECID, after verifying that i found out the W25Qxx has various config from the factory chip where were they set the ic default to quadspi mode, so inorder to find that, the JEDECID[3], has 3 x 8 bits of data, when read the 1st data provides the JEDEC ID => 0xEF, then the second and the third data mentions the config 0x4017, then the 40 means it is internally configured to be quadspi, if it was 0x70, it means we have to configure it manually, then figured out the rest of the setting, the registers were pretty much easy to understand, then i was exploring all the different modes, where i found out the memory map mode basically the flash will be connected to the address of the mcu from 0xc0000000, so after all the bug fixing and the config, i created a pointer pointed it to the flash region start address then asked it to read the contents and in the debugger view i saw the data, so the FK743 board was already loaded with value startting froom 0x00 to 0x01, 0x02, and the data matached no error throwed up. Next started working on the w9825g6kh-6I with the FMC, it took me a while to under the whole concept, there were lotsssss of pins, annoying amount of pins to intialize, figured it out set the pins then started with the init function figured it out then i started with the timing calculations, then finished all the functions and tested it intially it was runnin got harfault handler, later to realize i did not add the registers correclty to the adddress in the typedef, and fixed it boom it worked again tested with an pointer and tried storing data and reading it, worked, then i opened the lash.ld, linker script, i created a new variable SDRAM with orgin from 0x90000000 (Refered from the RM), then then created a small script

    .sdram (NOLOAD) :
  {
   . = ALIGN(32);
   _ssdram = .;
   *(.sdram)
   *(.sdram*)
   . = ALIGN(32);
   _esdram = .;
  } >SDRAM

now i moved my layer0 frame buffer to the sd_ram using this attribute((section(".sdram"), aligned(32))) on the top, tested by starting the lvgl ui, it worked, then created the seconf fb finally, added it to the lvgl init function, and made some changes in the flush function, it was working well, also i figured out why there was lot of glitching in the screen, LTDC_SSCR , in this register there are two options, Vertical synchronization height (VHS) & Horizontal synchronization width (HSW), I was using the HSW, where it was loading right to left, buf when i changed it to the VHS the fickering literally went away, it reduced the complexity.

What I did

• Completed FMC & QSPI, Integrated the ExtFlash & ExtSDRAM
• Updated the FB into SDRAM.
• Fixed the screen glitching using the VHS.

Next

• DMA2D & Remaing sensor integration & SDMMC.